The present invention relates to a method of fabrication of a compact high-speed bipolar device in VLSI technology.
The semiconductor industry has sought methods of fabrication to improve the switching speed and reduce the size of bipolar devices. One technique developed in pursuit of this objective is a polysilicon self aligned device. In 1978 Nippon Electric Company of Japan developed a self aligned bipolar device which utilized a local oxide separation method to separate the base region and the N.sup.+ emitter published in October, 1978 in "IEEE Journal of Solid State Circuits, Vol. SC-13, No. 5, pp. 693-698 by K. Okada". Oxide Isolation was also used to separate the emitter from the collector. Due to the size constraints of such oxide, the Okada device does not lend itself to significant size reduction.
Fairchild Camera and Instrument as described in U.S. Pat. No. 4,148,468 issued Dec. 6, 1983 by M. Vora used the basic concept of the polysilicon aligned device, except it deposited the N.sup.+ polysilicon initially and then grew a thin spacer oxide after which the P.sup.+ was deposited. In growing the spacer oxide the base is oxidized making control of the base profile difficult. Further a high temperature oxidation is done to drive the impurities and grow oxide on the p.sup.+ polysilicon. Since the oxidation is performed at 1,000.degree. C. It is difficult to keep the base profile shallow using the Vora method. Moreover, oxidation of the P.sup.+ results in boron segregation out of the polysilicon into the oxide thus causing a depletion of boron concentration at the polysilicon surface. As with the Okada approach Vora separates the collector from the emitter by isolation oxide.
U.S. Pat. No. 4,481,706 issued Nov. 13, 1984 to M. Roche describes a polysilicon self-aligned device in which the spacer oxide was deposited rather than grown. However, the emitter is formed by an implant and subsequent diffusion of the emitter prior to deposition of polysilicon. Such a method of application makes it difficult to make the junctions very shallow. Furthermore, the base of Roche requires a substantial anneal due to the lateral diffusion required to meet the P.sup.+ contact region. In addition, a nitride layer is used in the spacer film thereby complicating the process.
U.S. Pat. No. 4,431,460 issued February 14 to Barson et al. following on with the Roche method optionally omits the nitride from the spacer film. However, Barson retains the same oxide film formed over the p.sup.+ polysilicon cap used for the base formation as the sidewall spacer. Using the same difficult to optimally reduce the base resistance, emitter-base capacitance and at the same time maintain a sufficiently high emitter-base breakdown voltage.
Siemens AG published a paper entitled "Self-Aligned Bipolar Technology-New Chances for Very High Speed Digital Integrated Circuits by A Wieder, Siemens Forsch. und Entw. Berichte Bd. 13, 1984, pp. 246-252" which appears to use the same film for the P.sup.+ polysilicon cap and the spacer plug. Thus, the latter device would therefore have the same disadvantages as discussed with respect to U.S. Pat. No. 4,431,460.
Accordingly, it is an object of the invention to provide an improved bipolar semiconductor device. It is a further object of the invention to provide an improved bipolar device which exhibits high speed and small dimensions. It is yet another object of the present invention to provide a bipolar semiconductor device which has a significantly smaller emitter to base spacing.